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Characterization Data for external FPGA memories DDR4 and HBM2 with High Level Synthesis
- Citation Author(s):
-
Maria AngélicaDávila
- Submitted by:
- Maria Davila
- Last updated:
- Tue, 05/17/2022 - 22:18
- DOI:
- 10.21227/4p1k-ng70
- Data Format:
- Research Article Link:
- Links:
- License:
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Abstract
This repository includes the data collected from the aocl profile and the Jupyter notebooks with the memory model equations proposed. Application folder contains a set of benchmarks to validate the proposed model.
The model was developed using the Quartus aocl version 18.1 for Stratix10 GX and 19.4 for Stratix10MX
Instructions:
Jupyter notebooks cells require to be executed following the strict sequential order for the model valuation. The FPGA model folders have reports with the necessary information for the model.
The benchmarks come from:
- Intel FPGA SDK. 2018.
- Cho.Vanderbauwhede, W., & Benkrid, K. (2013). High- Performance Computing Using FPGAs. Springer.
- Rodinia by Zohuri. Hamid Reza Zohouri, Naoya Maruyama, Aaron Smith, Motohiko Matsuda, and Satoshi Matsuoka, "Evaluating and Optimizing OpenCL Kernels for High Performance Computing with FPGAs," Proceedings of the ACM/IEEE International Conference for High Performance Computing, Networking, Storage and Analysis (SC'16), Nov. 2016.
- FBLAS.De Matteis, T., Licht, J. D. F., & Hoefler, T. (2019). FBLAS: streaming linear algebra on FPGA. arXiv preprint arXiv:1907.07929.
- HiFlipVX for Intel. Davila et. al.
